WEBVTT

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Okay, first of all, thank you very much for coming to my talk.

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I'm very glad that so many of you are interested in open source

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sphere, metaphor, confination of building.

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Second, thanks to DevRome managers for accepting my talk.

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Yeah, luckily this year we don't have open source

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pyramid DevRome, but anyway, I got there quite a lot of feedback from

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many people, so I would like to thank all the reviewers of this presentation.

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Thremed up, me how was the brain technical coding developers brain behind this?

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I'm a coordinator and kind of high level vision for that.

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So modern high, modern high assurance requires

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confidential computing.

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We have 10 years of confidential computing.

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Definity, this is like a state-of-the-art part of the security ecosystem.

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And I don't think we can build high assurance infrastructure

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without confidential computing.

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And of course, we need high assurance to build some sovereignty.

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So how we will do this, if we don't have enough experts,

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and of course we have to grow more experts, we need more seniors.

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So how we grow those seniors need some hardware,

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some transparent ecosystem, which they can inspect,

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research, analyze, reason about.

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And this is what this talk is about.

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So first of all, I would like to give a

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to confidential computing ecosystem some research platform for

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the educational purposes for security research purposes,

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which they can easily inspect.

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And then hopefully that will increase transparency

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in the ecosystem, increase openness of the ecosystem.

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And then hopefully we can get the underlying key components

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of the firmware, which are right now,

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close swords, binary robes, going into standardization,

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and openness.

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And what I will show in this presentation,

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the firmware trust problem, and who, all these who,

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and where, like, who we rely on,

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then I will tell you about open seal and core boot,

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and what we did to open the ecosystem.

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And then I will show you the demo of the stock,

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showing the SCV, S&P,

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attestation on the open seal plus core boot on the retail server,

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which you can buy, which you can provision,

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which you can flash, and play with, of course,

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if you can afford the memory design.

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Okay, so this, I don't expect you to read this,

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go back to the presentation, read the details,

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I know the letters are small.

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This slide is just to tell you what's my thinking about high assurance,

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and this is definitely extremely simplified view,

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because it's not enough here.

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It, this picture should be much bigger.

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But let's start from the right side.

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First of all, I'm thinking about the bootstrapable tool chains.

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This is inspired by stage X, this trust company, this stage X,

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which is very similar to GUIX, to next thinking,

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but also a little bit different in some places.

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But it doesn't matter the point is to bootstrap from some,

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from some seed, from some known,

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all the table piece of bytes, in assembly, whole tool chain.

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So we can do this in a reproducible way,

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and we can make sure that it's really what we,

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that what we building is really from the code that we get,

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things we have some transparency.

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When we have the tool chain, we can start building.

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How we building, we have to build on multiple targets,

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to have distributed reproducibility code on,

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because if we will build on multiple targets,

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they will agree on the harshest.

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That means the software supply chain is not compromised,

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and it's very likely we can build some trust

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worthiness based on that evidence.

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If we do a very metal on different architectures,

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for cross compiling, this is even better.

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Then if we have some builds, and we have some trust worthiness

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in those build, and some assurance of those builds,

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we can go into owner controller through the status

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and chain of trust, that's kind of future,

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3M depth contributing a lot to that future,

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to make the ability of buying the hardware,

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and you essentially can't provision all your own keys

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into a good guard, or whatever AMD platform,

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secure boot, or whatever ARM platform,

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so you can really own the platform,

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that the keys, your keys are fused in OTP,

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or ifuses, and from the beginning of the word,

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from the power on everything whole whole software is yours.

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After that, after that, I hope this can contribute

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to the confidential computing ecosystem,

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and hopefully at some point we will have some open source

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firmware here, and open source firmware here.

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This is trusted execution environment security monitor.

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I have a lot of slides, so I have to speed up

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because I don't have time to talk about all those details.

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I want to build some parallel, because some of you

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maybe don't know, okay, what is this open source

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firmware ecosystem?

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I just want to tell you, like, you know,

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cardboard, who knows, cardboard?

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Good, but very good.

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Tyano core is an IDK, IDK2,

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IDK2, IDK2, IDK2, IDK2,

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UFI, reference implementation ecosystem,

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Linux boot, Snim boot loader,

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AMD open seal is kind of new thing.

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I will talk a little bit about OpenSFI,

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which is OCP activity.

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It's even newer thing, it's right now in drafting.

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Caliptera, very good root of trust,

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despite coming from Microsoft,

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but Microsoft AMD and Google,

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but it's very good, really.

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Read the specification, it's very good.

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Open Titan, trusted firmware,

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and Linux is because of the presence in OpenBMC.

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I want to build some parallel with the BIOS evolution.

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So, I divided the evolution of Confederation computing

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into IRAS, like the BIOS evolution.

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So, in the beginning, we have this proprietary error.

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Then we have some tribes of openness and standardization,

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like we see here.

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And then hopefully we go more into standardization

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when we have standards, we can build the open implementations

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and try to improve our ecosystem to make it more trustworthy.

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And build this architecture that we talk about.

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I'm not sure if I should go very deep into that one.

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You probably all know this evolution.

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So, it depends how we count.

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2017, some say 2016,

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because the white paper was from 2016,

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but the processors were cheaper to lighter.

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But we essentially have these generations of AMD processor,

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Naples, Rome, Milan, Genoa, Turing,

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which every includes more and more security features.

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Turing includes SVT, trusted IO,

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which is very interesting.

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We plan to do some stuff with that.

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But point of the slide is showing.

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First of all, by the way, security promise was not publicly communicated from AMD.

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There was no CVs.

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There were internal tracking of the firmware security issues.

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About they were not as a CVs.

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If you look into release notes of the AMD SCV firmware,

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you will find there were problems there.

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Then they communicated at the Milan state.

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They communicated this security.

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And then suddenly CVs were issues.

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We see just in the AMD SCV firmware,

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we got 22 here, 28 here and so far, 15 for Turing.

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Some of those are cross-cross micro-architectures.

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So that's the point of the slide to show that this closed source piece is quite vulnerable.

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And there are a lot of evidence for problems there.

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Okay?

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Okay.

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And this trust problem.

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We got 20 years of trusted computing.

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I know you don't like trusted computing because you like confidential computing.

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And this is kind of in that being cooperation.

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It is like kind of some small war.

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But the point is trusted computing working for 20 years,

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on improving the ecosystem.

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As bombs, you know, TPM, standardization of the protocol dies,

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then openness of the BIOS.

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All this work made around core boot and so on and so on.

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Harder true of the root of trust, also provisioning code.

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Harder true of trust we working hard on opening that.

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BMC also is we're opening that.

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We're going into some standardization versus PDM.

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Also dies in BMC appearing.

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Then we're saying, okay, let's don't trust this one.

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We will trust this one, which is like binary block.

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And it's closed source.

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We don't really know what is going there.

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So we essentially took all this work and transferred that to some closer to the ecosystem.

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Okay, that's fine.

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That's why, but let's now work on improving this ecosystem.

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So why this is wrong?

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Intel management engine story showing so many vulnerabilities.

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Single co processor is essentially a risk.

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And especially cross it source one.

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Then BIOS Richard openness with the core boot, then open seal from AMD.

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Essentially opens the silicon initialization part.

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So part of the initialization of the AMD processor was moved to ASP.

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The most secret part, memory initialization.

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But rest was left in the open.

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And now we can have totally fully BIOS for AMD.

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And this is what I will tell you about on later slides.

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Because that's essentially a huge achievement.

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And thanks to thanks to the AMD.

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Yeah, this is what I said.

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Yeah, this is like skis of RAM, yeah.

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Okay, AMD co founded the Kaliptera.

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There's really great spec.

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It's the everything is well thought.

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Really really respect.

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I just hope that at some point we will have this chip in regular devices.

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And really the promise of the spec will deliver.

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But on the one side we have Kaliptera.

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And on the other side they deliver this.

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So I'm not sure I don't understand this.

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Unless at some point Kaliptera will replace AMD security processor.

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And this is quote from Brian Kelly from Microsoft who's Kaliptera architect.

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Great security compromised by other great ideas.

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Start to weaken its security posture.

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So the point is that if security project is successful.

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Then there's money in that project.

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And there are managers who wants to create new features for the project.

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More features, more features, bigger PCB, more vulnerabilities.

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And essentially good project is no longer good project.

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Yeah.

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So we have to be conscious about that part.

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So let's start what we build.

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So this is state from last year.

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This has state of high assurance.

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Confidential infrastructure from last year.

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So you see that we already got operating system open.

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Yeah, we we even have firmware in this VMs open.

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We got open hypervisors.

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Firmare not really bios.

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No no.

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Sometimes BMC for some platforms.

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But then we didn't know like what kind of proprietary pieces are there.

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Sometimes BMC could be OTP fuse it to boot just the open.

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Excuse me.

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Just operating system vendor wants GPU definitely not.

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The that the test execution environment security manager definitely definitely.

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So ASP or whatever Intel has like management engine.

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Definitely not.

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Of course we have IBM and and arm, which is like a little bit more open.

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But that difference that's different story.

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And it's in CPU also.

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Some platforms got.

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Intel boot got provision at some note.

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So it depends.

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So this was of course a level.

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We just were thinking.

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Okay, what's going on here?

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Where is the platform?

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Which platform we should choose?

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Which will give us ability to implement that.

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And then this we know already.

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Thanks to open seal and core boot dot.

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Yeah, we can do this.

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That's why it was already planted.

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And.

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Okay, little bit about the open open seal.

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I already told you about little bit about it.

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So who knows Agissa and the Agissa.

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Okay, some.

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So I'm the Agissa is a is a silicon initialization component that is added to BIOS by AMD.

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So yeah, this is secret source for for an initialization of the silicon.

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Yeah, it's like Intel FSP also.

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The the point here is that Intel FSP took into consideration integration with the core boot.

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So they have special mode of Intel FSP to integrate with open source BIOS.

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And AMD did not of course there were really days of of AMD where they completely open source Agissa.

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And it was included in the core boot.

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But that's not what I'm talking.

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I'm talking about the modern platform.

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It's not the very legacy one.

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So this was not all the table.

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This was not all the table because this has been iron broke.

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And then we have open seal, which is fully open source is on.

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I guess MIT license on GitHub.

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Everyone can contribute to it.

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And we already did quite a lot of that.

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It consists of three libraries.

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Silicon initialization for memory and CPU part of the initialization platform reference

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Firmare for platform right at configuration.

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And utilities is at service if someone wants to add something more to this to this part.

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But you know typically we want to leave it as small as possible.

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And this was contributed to OCP as a standard in September 2025, which is very, very good.

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And of course what we still have this one, I will not torture AMD more.

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Okay.

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So let's look at the boot chain.

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How it looks like?

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This is how it looks like before.

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So we got some root of trust in our AMD security processor.

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Then we have independent bios vendor framework, which we have no idea what's going on inside.

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Something, something binary blocks and essentially closed source.

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We knew that they integrated Agesar because that they needed for initialization of the AMD silicon.

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And maybe they added some other features.

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And then at some point we started hypervisor and from that combination VMs.

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So we moved.

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This is what 3M depth contributes with our code to cardboard.

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So this one is just the standard boot process of cardboard.

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And you can see that open seal is kind of blue at the RAM state level.

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So this is one of the stages of booting of cardboard.

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We cannot, we couldn't do this with Agesar because it's UFI only.

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And RAM state cardboard does not implement this interface.

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So this was not an option.

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But this was possible to implement everything.

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Every each step is is open.

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It's contributed upstream mostly merged.

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Okay.

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Okay.

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This is the hardware.

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This is Gigabyte MZ33-IR1.

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Turing by Splatform.

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We know that it's not provisioned with PSB unless they will change something in shipping.

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But right now it is not.

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We already confirmed there is no security in VMC.

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So VMC is also possible.

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So this is first retail server hardware, which will be shipped with open source firmware.

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For the introspection in the confidential computing environment.

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This is story on our blog post.

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So this was the size of the contribution without SVSNP.

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It was 13, 30,000 lights of code 80 for patches to cardboard.

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7 to open seal around, you know, 3.7 of open seal code base was delivered with that work.

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You can read about that using those links, rights are on the website.

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Okay.

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A little bit about the SVSNP implementation around 900 lines of code in cardboard and open seal.

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This is what was delivered.

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So yeah, I guess I will not dive into this.

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It's like some PSP initialization, some memory integrity protection initialization mailbox for PSP.

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So like some basic stuff to establish relation with with a SP with PSP to be able to run this feature on the open source feed my files.

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Okay.

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This is attestation.

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I also think most of you know what's going on here.

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So we have our confidential VM.

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We have this project SNP guest.

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We just creating a report which talks with AMD secure processor.

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It using this vendor chip and those met key to sign it returns reports.

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Then we fetch from the AMD server certificates.

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We check that everything is okay.

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Yeah, which checking that this sign is okay.

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And then we can attest that whatever we get here from AMD SP is correct.

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And then we will go to the yeah.

17:12.200 --> 17:15.200
Attestation is completed.

17:15.200 --> 17:18.200
Okay, demo time.

17:18.200 --> 17:21.200
Let me go here.

17:21.200 --> 17:46.200
Yeah, so first of all, we showing this is really core boot.

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And that this is this gigabyte platform.

17:50.200 --> 17:52.200
Then we showing that the kernel.

17:52.200 --> 17:55.200
This is Ubuntu that the kernel really detected the features.

17:55.200 --> 17:58.200
And what kind of features are enabled.

17:58.200 --> 18:10.200
Then we start in QAMO with AMD SCV BIOS and all the required parameters.

18:10.200 --> 18:20.200
And inside, we will essentially run this SNP guest report and confirm that the auto stations exceed.

18:20.200 --> 18:35.200
Maybe I can make it a little bit faster.

18:35.200 --> 18:38.200
The SNP guest.

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We use root.

18:41.200 --> 18:46.200
We're checking the features that the features are really recognized by the.

18:46.200 --> 18:56.200
That we are in VMPL zero that the features are really recognized by the QAMO KVM.

18:56.200 --> 18:59.200
Yeah, we have to load the module.

18:59.200 --> 19:03.200
And then we're going to generate report.

19:03.200 --> 19:05.200
Yeah, the report is generated.

19:05.200 --> 19:12.200
Then we have to fetch all the keys from the server.

19:12.200 --> 19:17.200
Yeah, which vendor, we fetch vendor chip and also in key,

19:17.200 --> 19:21.200
with which that the keys are correctly signed.

19:21.200 --> 19:26.200
And then we do the auto station and confirm that everything.

19:26.200 --> 19:29.200
There's certainly a much is the attestation report and so on.

19:29.200 --> 19:31.200
So that's what was delivered.

19:31.200 --> 19:36.200
And let me get back to slides.

19:36.200 --> 19:38.200
And this is the state after.

19:38.200 --> 19:40.200
So the next slide is maybe better.

19:40.200 --> 19:41.200
This is better.

19:41.200 --> 19:42.200
So this is what changed.

19:42.200 --> 19:45.200
So we have no keys here.

19:45.200 --> 19:47.200
We have no keys here.

19:47.200 --> 19:49.200
We deliver this part.

19:49.200 --> 19:52.200
Of course, this part and this part stay close.

19:52.200 --> 19:54.200
We provide that there is no key here.

19:54.200 --> 19:57.200
And then because of that, we planning this one.

19:57.200 --> 20:01.200
We planning OpenBNC with fusing.

20:01.200 --> 20:03.200
Also fusing for the CPU.

20:03.200 --> 20:05.200
And we already delivered this part.

20:05.200 --> 20:09.200
So we have BIOS, which is open for your in-spoke

20:09.200 --> 20:11.200
Interspection of the.

20:11.200 --> 20:12.200
Yeah, I have to finish.

20:12.200 --> 20:14.200
So I will just tell you.

20:14.200 --> 20:16.200
There are kind of some backup slide.

20:16.200 --> 20:18.200
But I will just tell you what's the future of that.

20:18.200 --> 20:21.200
The future is that we have to complete the upstreaming.

20:21.200 --> 20:23.200
We would like to offer.

20:23.200 --> 20:24.200
The shot already.

20:24.200 --> 20:27.200
So the shot is like a downstream distribution of the core boot,

20:27.200 --> 20:29.200
which trimmed up many things.

20:29.200 --> 20:32.200
So we will sell the gigabyte hardware with this.

20:32.200 --> 20:34.200
But you don't have to buy from us.

20:34.200 --> 20:36.200
You can buy the hardware yourself and flash yourself.

20:36.200 --> 20:38.200
Compile and flash yourself.

20:38.200 --> 20:41.200
And it would be great if you could deliver some feedback.

20:41.200 --> 20:44.200
And some essentially testing because, you know,

20:44.200 --> 20:46.200
there are memory testing.

20:46.200 --> 20:48.200
Perifer testing is very important.

20:48.200 --> 20:52.200
The next thing is SCV trusted IO for GPU accelerators.

20:52.200 --> 20:54.200
I hope my being next year I can show that.

20:54.200 --> 20:56.200
And participation in OpenSFI.

20:56.200 --> 21:01.200
And in future, I hope we can contribute the same stuff for the other

21:01.200 --> 21:03.200
confidential computing pieces.

21:03.200 --> 21:05.200
And that's it from my side.

21:05.200 --> 21:09.200
And we can, I don't know if we have any time for question.

21:09.200 --> 21:11.200
Thank you very much.

21:11.200 --> 21:15.200
Yes.

21:15.200 --> 21:19.200
So when it's like something you were talking about.

21:19.200 --> 21:22.200
But you were talking so.

21:22.200 --> 21:24.200
Which one is it?

21:24.200 --> 21:26.200
Is it green and draw a post?

21:26.200 --> 21:28.200
What kind of protocol is it using?

21:28.200 --> 21:30.200
You're just going like.

21:30.200 --> 21:32.200
So let's be honest.

21:32.200 --> 21:33.200
I'm not expert with attestation.

21:33.200 --> 21:35.200
We're using an SNP guest.

21:35.200 --> 21:38.200
You can, that's open source project from AMD.

21:38.200 --> 21:41.200
You can check the source code and see how they doing it.

21:41.200 --> 21:44.200
I don't know because I didn't expect that source.

21:44.200 --> 21:46.200
That's not my point of this presentation.

21:46.200 --> 21:49.200
The point of presentation is showing that I'm giving open source

21:49.200 --> 21:52.200
Firmary-based platform for researchers' introspection.

21:52.200 --> 21:53.200
That might go.

21:53.200 --> 21:56.200
And attestation ecosystem and binaries for

21:56.200 --> 21:57.200
Acestation is your topic.

21:57.200 --> 21:59.200
It's confidential computing developers.

21:59.200 --> 22:01.200
Researchers architect topic.

22:01.200 --> 22:02.200
That's not my topic.

22:02.200 --> 22:04.200
Yes?

22:04.200 --> 22:05.200
Good question.

22:05.200 --> 22:07.200
The memory that I've insinitation.

22:07.200 --> 22:09.200
Is there any purpose in this?

22:09.200 --> 22:11.200
Is it new to scope open?

22:11.200 --> 22:13.200
Yes.

22:13.200 --> 22:17.200
Is it a memory-genization scope of the open-seal?

22:17.200 --> 22:18.200
No.

22:18.200 --> 22:22.200
The most secret code was moved into PSP into PSP.

22:22.200 --> 22:25.200
And that's why they can reveal all the other stuff.

22:25.200 --> 22:28.200
That's why they give open-seal to the public.

22:28.200 --> 22:30.200
That's, I think that's good choice.

22:30.200 --> 22:33.200
Now we have to fight the next stage.

22:34.200 --> 22:35.200
Yeah.

22:35.200 --> 22:40.200
For your conduct, so you have only your roadmap into TDS.

22:40.200 --> 22:43.200
I'm sent a lot of what you did for your personal platform.

22:43.200 --> 22:45.200
By the way, is it possible to go to open-seal?

22:45.200 --> 22:47.200
Is there something similar for Intel?

22:47.200 --> 22:48.200
Yes.

22:48.200 --> 22:50.200
It's Intel at the SP, it's closed source.

22:50.200 --> 22:55.200
Is it possible open source firmware for Intel and Intel TDX?

22:55.200 --> 23:00.200
To some extent, Intel keeps more proprietary closed source

23:00.200 --> 23:01.200
groups.

23:01.200 --> 23:05.200
So, AMD got open-seal, Intel got Intel FSP.

23:05.200 --> 23:08.200
Intel FSP is closed so far and I don't think they will open it.

23:08.200 --> 23:09.200
So, that's the limitation.

23:09.200 --> 23:14.200
We have other platform, ASROR, CRAC, which you can find on our website.

23:14.200 --> 23:17.200
Suffer app is, I guess, supports TDX.

23:17.200 --> 23:18.200
A lot of question.

23:18.200 --> 23:21.200
I'd know, like, what kind of level of TDX features its supports.

23:21.200 --> 23:23.200
We already have DashROR for it.

23:23.200 --> 23:24.200
So, there is open source for it.

23:24.200 --> 23:25.200
Yeah.

23:25.200 --> 23:29.200
So, there is possibility for researcher to enter something and check how much open it is.

23:29.200 --> 23:34.200
So, what's the roadmap to what's having the system before it?

23:34.200 --> 23:37.200
We are going to do things like the GPU, the network.

23:37.200 --> 23:39.200
We have to keep our control up.

23:39.200 --> 23:43.200
I mean, we have that business power in the home, because it's power to go out.

23:43.200 --> 23:45.200
But that's been a while ago.

23:45.200 --> 23:50.200
And I haven't seen anything similar to that's called on our AMD 64.

23:50.200 --> 23:51.200
Yes.

23:51.200 --> 23:56.200
So, the question is, what about other components like GPU firmware?

23:56.200 --> 24:01.200
And, and the second was, this is a component.

24:01.200 --> 24:02.200
We have to keep our control.

24:02.200 --> 24:03.200
We have all these other things.

24:03.200 --> 24:04.200
Network, keyboard control.

24:04.200 --> 24:06.200
So, and essentially periphery controls.

24:06.200 --> 24:07.200
Yes.

24:07.200 --> 24:09.200
Platforms are full of firmware, full of proprietary firmware.

24:09.200 --> 24:11.200
I'm not sure we can do everything.

24:11.200 --> 24:13.200
We are just small company.

24:13.200 --> 24:14.200
Like, help us.

24:14.200 --> 24:16.200
Like, let's do it together.

24:16.200 --> 24:21.200
Yes, there is work in almost every piece of ecosystem.

24:21.200 --> 24:25.200
And we just have to push forward to propose something,

24:25.200 --> 24:29.200
to show that the closer it's site, that a lot of CVs, that's our work.

24:29.200 --> 24:31.200
Regarding the power, we did the power.

24:31.200 --> 24:37.200
We did the transition of the C++ 800,000 lines of code of C++ to see the gore boot.

24:37.200 --> 24:42.200
There is some small false promise there, which I can talk about you after,

24:42.200 --> 24:46.200
because that's, with thinking that everything is completely open source on power,

24:46.200 --> 24:48.200
but there are some missing specs.

24:48.200 --> 24:49.200
Yeah?

24:49.200 --> 24:53.200
You know, the thing that you can actually reverse the layer search,

24:53.200 --> 24:56.200
and well-impeared, we see the chasing that vendors will be producing,

24:56.200 --> 24:58.200
as a specular specification.

24:58.200 --> 25:01.200
We are pulling them to three years.

25:01.200 --> 25:07.200
We see them to create this location based on the observations from the open source projects.

25:07.200 --> 25:09.200
One example is the feedbacks.

25:09.200 --> 25:10.200
There's a new version.

25:10.200 --> 25:12.200
Valet IO, which is on PCI.

25:12.200 --> 25:14.200
There is no hardware on that.

25:14.200 --> 25:17.200
And that's where you can get it's 336.

25:17.200 --> 25:24.200
So at least 1, 2, 3 years after we're going to get something on the PX 2.0.

25:24.200 --> 25:28.200
Yeah, so emulation is one thing we should push.

25:28.200 --> 25:34.200
So the question is, if we can somehow reverse with the proprietary vendors to have something

25:34.200 --> 25:38.200
earlier, or we'll cooperate with open ecosystem to have the features earlier,

25:38.200 --> 25:40.200
then they release hardware.

25:40.200 --> 25:45.200
And yes, I think they, so Intel do in Cmix, I think they should release more in Cmix,

25:45.200 --> 25:49.200
and essentially provide working models for those advanced features.

25:49.200 --> 25:52.200
QM could also get the contribution.

25:52.200 --> 25:59.200
What would be the rough cost for a lunch system based on this?

25:59.200 --> 26:01.200
That's a very good question.

26:01.200 --> 26:06.200
It really, yeah, what would be the rough cost for this system?

26:06.200 --> 26:08.200
What we did here was very expensive.

26:08.200 --> 26:09.200
I will tell you.

26:09.200 --> 26:11.200
It's not easy project.

26:11.200 --> 26:15.200
It's not sponsored by NLNet, but NLNet also kind of finishing sponsoring,

26:15.200 --> 26:17.200
and also we have to leave somehow.

26:17.200 --> 26:23.200
Yeah, so it would definitely be margin on top of the, on top of the regulars.

26:23.200 --> 26:25.200
It would be very hefty margin.

26:25.200 --> 26:29.200
But on the other side, I don't expect you to pay that margin, because you are the hackers.

26:29.200 --> 26:31.200
I don't want to earn money on hackers.

26:31.200 --> 26:32.200
I don't care.

26:32.200 --> 26:35.200
I care about those who want to benefit from open ecosystem,

26:35.200 --> 26:38.200
without contributing to this ecosystem.

26:38.200 --> 26:39.200
They will pay.

26:39.200 --> 26:43.200
You can take the platform, get the code, compile yourself, and necessarily flash.

26:43.200 --> 26:44.200
And that's for free.

26:44.200 --> 26:53.200
The board cost, like, you know, the board cost is nothing comparison to memory cost.

26:53.200 --> 27:00.200
So for, so it really depends which CPU you will use.

27:00.200 --> 27:02.200
Yeah, it really depends on that.

27:02.200 --> 27:07.200
I don't know what's the right now, how much 600 euro or something for this motherboard or something.

27:07.200 --> 27:08.200
You can, isn't it?

27:08.200 --> 27:13.200
Check, NZ33, A01, eBay, and check what's the price.

27:13.200 --> 27:17.200
Hi, I'm wondering if you looked into it, like, the code driver,

27:17.200 --> 27:22.200
or the NLNet, which driver?

27:22.200 --> 27:23.200
Which driver?

27:23.200 --> 27:25.200
The code driver of the CPU.

27:25.200 --> 27:26.200
Cove driver?

27:26.200 --> 27:27.200
Go.

27:27.200 --> 27:28.200
Ah, go.

27:28.200 --> 27:29.200
Graphical driver.

27:29.200 --> 27:31.200
No, no, no, no, no, no, no, no.

27:31.200 --> 27:35.200
This is not yet, maybe when we will get into a CV trusted IOR,

27:35.200 --> 27:38.200
this would be something which will be more interesting,

27:38.200 --> 27:41.200
because we will have some security story there.

27:41.200 --> 27:44.200
Yeah, because that's, you know, I'm working on the thing report.

27:44.200 --> 27:48.200
So I'm trying, but you need that information.

27:48.200 --> 27:49.200
Cool, cool.

27:49.200 --> 27:51.200
So we can, like, we definitely, if you will publish it,

27:51.200 --> 27:56.200
we definitely can pick up and, and think.

27:56.200 --> 27:57.200
All right.

27:57.200 --> 27:58.200
Thank you again.

27:58.200 --> 27:59.200
Thank you very much.

27:59.200 --> 28:01.200
Thank you.

